#ifndef __ASM_CPUCAP_DEFS_H
#define __ASM_CPUCAP_DEFS_H

/* Generated file - do not edit */

#define ARM64_ALWAYS_BOOT                             	0
#define ARM64_ALWAYS_SYSTEM                           	1
#define ARM64_BTI                                     	2
#define ARM64_HAS_32BIT_EL0_DO_NOT_USE                	3
#define ARM64_HAS_32BIT_EL1                           	4
#define ARM64_HAS_ADDRESS_AUTH                        	5
#define ARM64_HAS_ADDRESS_AUTH_ARCH_QARMA3            	6
#define ARM64_HAS_ADDRESS_AUTH_ARCH_QARMA5            	7
#define ARM64_HAS_ADDRESS_AUTH_IMP_DEF                	8
#define ARM64_HAS_AMU_EXTN                            	9
#define ARM64_HAS_ARMv8_4_TTL                         	10
#define ARM64_HAS_CACHE_DIC                           	11
#define ARM64_HAS_CACHE_IDC                           	12
#define ARM64_HAS_CNP                                 	13
#define ARM64_HAS_CRC32                               	14
#define ARM64_HAS_DCPODP                              	15
#define ARM64_HAS_DCPOP                               	16
#define ARM64_HAS_DIT                                 	17
#define ARM64_HAS_E0PD                                	18
#define ARM64_HAS_ECV                                 	19
#define ARM64_HAS_ECV_CNTPOFF                         	20
#define ARM64_HAS_EPAN                                	21
#define ARM64_HAS_EVT                                 	22
#define ARM64_HAS_FPMR                                	23
#define ARM64_HAS_FGT                                 	24
#define ARM64_HAS_FGT2                                	25
#define ARM64_HAS_FPSIMD                              	26
#define ARM64_HAS_GCS                                 	27
#define ARM64_HAS_GENERIC_AUTH                        	28
#define ARM64_HAS_GENERIC_AUTH_ARCH_QARMA3            	29
#define ARM64_HAS_GENERIC_AUTH_ARCH_QARMA5            	30
#define ARM64_HAS_GENERIC_AUTH_IMP_DEF                	31
#define ARM64_HAS_GICV3_CPUIF                         	32
#define ARM64_HAS_GICV5_CPUIF                         	33
#define ARM64_HAS_GICV5_LEGACY                        	34
#define ARM64_HAS_GIC_PRIO_MASKING                    	35
#define ARM64_HAS_GIC_PRIO_RELAXED_SYNC               	36
#define ARM64_HAS_ICH_HCR_EL2_TDIR                    	37
#define ARM64_HAS_HCR_NV1                             	38
#define ARM64_HAS_HCX                                 	39
#define ARM64_HAS_LDAPR                               	40
#define ARM64_HAS_LPA2                                	41
#define ARM64_HAS_LSE_ATOMICS                         	42
#define ARM64_HAS_LS64                                	43
#define ARM64_HAS_LS64_V                              	44
#define ARM64_HAS_MOPS                                	45
#define ARM64_HAS_NESTED_VIRT                         	46
#define ARM64_HAS_BBML2_NOABORT                       	47
#define ARM64_HAS_PAN                                 	48
#define ARM64_HAS_PMUV3                               	49
#define ARM64_HAS_S1PIE                               	50
#define ARM64_HAS_S1POE                               	51
#define ARM64_HAS_SCTLR2                              	52
#define ARM64_HAS_RAS_EXTN                            	53
#define ARM64_HAS_RASV1P1_EXTN                        	54
#define ARM64_HAS_RNG                                 	55
#define ARM64_HAS_SB                                  	56
#define ARM64_HAS_STAGE2_FWB                          	57
#define ARM64_HAS_TCR2                                	58
#define ARM64_HAS_TIDCP1                              	59
#define ARM64_HAS_TLB_RANGE                           	60
#define ARM64_HAS_VA52                                	61
#define ARM64_HAS_VIRT_HOST_EXTN                      	62
#define ARM64_HAS_WFXT                                	63
#define ARM64_HAS_XNX                                 	64
#define ARM64_HAFT                                    	65
#define ARM64_HW_DBM                                  	66
#define ARM64_KVM_HVHE                                	67
#define ARM64_KVM_PROTECTED_MODE                      	68
#define ARM64_MISMATCHED_CACHE_TYPE                   	69
#define ARM64_MPAM                                    	70
#define ARM64_MPAM_HCR                                	71
#define ARM64_MTE                                     	72
#define ARM64_MTE_ASYMM                               	73
#define ARM64_MTE_FAR                                 	74
#define ARM64_MTE_STORE_ONLY                          	75
#define ARM64_SME                                     	76
#define ARM64_SME_FA64                                	77
#define ARM64_SME2                                    	78
#define ARM64_SPECTRE_V2                              	79
#define ARM64_SPECTRE_V3A                             	80
#define ARM64_SPECTRE_V4                              	81
#define ARM64_SPECTRE_BHB                             	82
#define ARM64_SSBS                                    	83
#define ARM64_SVE                                     	84
#define ARM64_UNMAP_KERNEL_AT_EL0                     	85
#define ARM64_WORKAROUND_834220                       	86
#define ARM64_WORKAROUND_843419                       	87
#define ARM64_WORKAROUND_845719                       	88
#define ARM64_WORKAROUND_858921                       	89
#define ARM64_WORKAROUND_1418040                      	90
#define ARM64_WORKAROUND_1463225                      	91
#define ARM64_WORKAROUND_1508412                      	92
#define ARM64_WORKAROUND_1542419                      	93
#define ARM64_WORKAROUND_1742098                      	94
#define ARM64_WORKAROUND_1902691                      	95
#define ARM64_WORKAROUND_2038923                      	96
#define ARM64_WORKAROUND_2064142                      	97
#define ARM64_WORKAROUND_2077057                      	98
#define ARM64_WORKAROUND_2457168                      	99
#define ARM64_WORKAROUND_2645198                      	100
#define ARM64_WORKAROUND_2658417                      	101
#define ARM64_WORKAROUND_4311569                      	102
#define ARM64_WORKAROUND_AMPERE_AC03_CPU_38           	103
#define ARM64_WORKAROUND_AMPERE_AC04_CPU_23           	104
#define ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE     	105
#define ARM64_WORKAROUND_TSB_FLUSH_FAILURE            	106
#define ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE      	107
#define ARM64_WORKAROUND_CAVIUM_23154                 	108
#define ARM64_WORKAROUND_CAVIUM_27456                 	109
#define ARM64_WORKAROUND_CAVIUM_30115                 	110
#define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM          	111
#define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM           	112
#define ARM64_WORKAROUND_CLEAN_CACHE                  	113
#define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE          	114
#define ARM64_WORKAROUND_NVIDIA_CARMEL_CNP            	115
#define ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS           	116
#define ARM64_WORKAROUND_QCOM_FALKOR_E1003            	117
#define ARM64_WORKAROUND_QCOM_ORYON_CNTVOFF           	118
#define ARM64_WORKAROUND_REPEAT_TLBI                  	119
#define ARM64_WORKAROUND_SPECULATIVE_AT               	120
#define ARM64_WORKAROUND_SPECULATIVE_SSBS             	121
#define ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD      	122
#define ARM64_NCAPS					123

#endif /* __ASM_CPUCAP_DEFS_H */
