// Copyright 2019 The Dawn & Tint Authors
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
//    list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright notice,
//    this list of conditions and the following disclaimer in the documentation
//    and/or other materials provided with the distribution.
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// 3. Neither the name of the copyright holder nor the names of its
//    contributors may be used to endorse or promote products derived from
//    this software without specific prior written permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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#ifndef SRC_DAWN_COMMON_GPUINFO_H_
#define SRC_DAWN_COMMON_GPUINFO_H_

#include <compare>
#include <string>

#include "absl/container/inlined_vector.h"
#include "dawn/common/GPUInfo_autogen.h"

namespace dawn::gpu_info {

// Four uint16 fields could cover almost all driver version schemas:
// D3D12: AA.BB.CCC.DDDD
// Vulkan: AAA.BBB.CCC.DDD on Nvidia, CCC.DDDD for Intel Windows, and AA.BB.CCC for others,
// See https://vulkan.gpuinfo.org/
inline constexpr uint32_t kMaxVersionFields = 4;

class DriverVersion {
  public:
    DriverVersion();
    DriverVersion(const std::initializer_list<uint16_t>& version);

    uint16_t& operator[](size_t i);
    const uint16_t& operator[](size_t i) const;

    uint32_t size() const;
    std::string ToString() const;

    std::strong_ordering operator<=>(const DriverVersion& other) const;

  private:
    absl::InlinedVector<uint16_t, kMaxVersionFields> mDriverVersion;
};

class IntelWindowsDriverVersion {
  public:
    explicit IntelWindowsDriverVersion(const DriverVersion& driverVersion);
    IntelWindowsDriverVersion(const std::initializer_list<uint16_t>& version);
    auto operator<=>(const IntelWindowsDriverVersion& anotherVersion) const = default;

  private:
    uint32_t mBuildNumber = 0;
};

// Intel architectures
bool IsSkylake(PCIDeviceID deviceId);
bool IsIrisPlus655(PCIDeviceID deviceId);

// GPU generation is an internal concept, rather than a value defined by vendors
// Intel generations
enum class IntelGen {
    Unknown = 0,
    Gen7 = 7,
    Gen8 = 8,
    Gen9 = 9,
    Gen10 = 10,
    Gen11 = 11,
    Xe = 12,
    Xe2 = 13,
    Xe3 = 14,
};

// Qualcomm ACPI generations
enum class QualcommACPIGen {
    Unknown = 0,
    Adreno6xx = 6,
    Adreno7xx = 7,
    Adreno8xx = 8,
};

IntelGen GetIntelGen(PCIVendorID venderId, PCIDeviceID deviceId);
QualcommACPIGen GetQualcommACPIGen(PCIVendorID venderId, PCIDeviceID deviceId);

// ARM
bool IsMaliG68(PCIDeviceID deviceId);

}  // namespace dawn::gpu_info
#endif  // SRC_DAWN_COMMON_GPUINFO_H_
