// This file is automatically generated by rmconfig - DO NOT EDIT!
//
// rmconfig runtime support that will be part of "core" resman.
//
// Profile:  shipping-gpus-openrm
// Template: templates/gt_rmconfig_util.c
//
// Chips:    TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB110, GB112, GB202, GB203, GB205, GB206, GB207, GB20B
//

#include "gpu/gpu.h"

#include "nvoc/runtime.h"
#include "nvoc/rtti.h"

// NVOC RTTI provider for IOM objects
const NVOC_RTTI_PROVIDER __iom_rtti_provider = { 0 };

//
// helper functions for IsCHIP() et.al.
// These help to reduce code size for runtime IsCHIP() and IsCHIPALIAS() invocations
//

NvBool rmcfg_IsTU102(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_TU102);
}

NvBool rmcfg_IsTU104(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_TU104);
}

NvBool rmcfg_IsTU104orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_TU104);
}

NvBool rmcfg_IsTU106(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_TU106);
}

NvBool rmcfg_IsTU106orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_TU106);
}

NvBool rmcfg_IsTU116(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_TU116);
}

NvBool rmcfg_IsTU116orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_TU116);
}

NvBool rmcfg_IsTU117(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_TU117);
}

NvBool rmcfg_IsTU117orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_TU117);
}

NvBool rmcfg_IsTU10X(POBJGPU pGpu)
{
    return IsTU102(pGpu) || IsTU104(pGpu) || IsTU106(pGpu) || IsTU116(pGpu) || IsTU117(pGpu);
}

NvBool rmcfg_IsGA100(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GA100);
}

NvBool rmcfg_IsGA100orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA100);
}

NvBool rmcfg_IsGA102(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GA102);
}

NvBool rmcfg_IsGA102orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA102);
}

NvBool rmcfg_IsGA103(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GA103);
}

NvBool rmcfg_IsGA103orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA103);
}

NvBool rmcfg_IsGA104(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GA104);
}

NvBool rmcfg_IsGA104orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA104);
}

NvBool rmcfg_IsGA106(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GA106);
}

NvBool rmcfg_IsGA106orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA106);
}

NvBool rmcfg_IsGA107(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GA107);
}

NvBool rmcfg_IsGA107orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA107);
}

NvBool rmcfg_IsGA10BorBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA10B);
}

NvBool rmcfg_IsGA10X(POBJGPU pGpu)
{
    return IsGA100(pGpu) || IsGA102(pGpu) || IsGA103(pGpu) || IsGA104(pGpu) || IsGA106(pGpu) || IsGA107(pGpu);
}

NvBool rmcfg_IsGA10XorBetter(POBJGPU pGpu)
{
    return IsGA100orBetter(pGpu);
}

NvBool rmcfg_IsGA102ForBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GA102F);
}

NvBool rmcfg_IsGA10XForBetter(POBJGPU pGpu)
{
    return IsAD102orBetter(pGpu);
}

NvBool rmcfg_IsAD102(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_AD102);
}

NvBool rmcfg_IsAD102orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_AD102);
}

NvBool rmcfg_IsAD103(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_AD103);
}

NvBool rmcfg_IsAD103orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_AD103);
}

NvBool rmcfg_IsAD104(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_AD104);
}

NvBool rmcfg_IsAD104orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_AD104);
}

NvBool rmcfg_IsAD106(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_AD106);
}

NvBool rmcfg_IsAD106orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_AD106);
}

NvBool rmcfg_IsAD107(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_AD107);
}

NvBool rmcfg_IsAD107orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_AD107);
}

NvBool rmcfg_IsAD10X(POBJGPU pGpu)
{
    return IsAD102(pGpu) || IsAD103(pGpu) || IsAD104(pGpu) || IsAD106(pGpu) || IsAD107(pGpu);
}

NvBool rmcfg_IsAD10XorBetter(POBJGPU pGpu)
{
    return IsAD102orBetter(pGpu);
}

NvBool rmcfg_IsGH100(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GH100);
}

NvBool rmcfg_IsGH100orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GH100);
}

NvBool rmcfg_IsGH10X(POBJGPU pGpu)
{
    return IsGH100(pGpu);
}

NvBool rmcfg_IsGH10XorBetter(POBJGPU pGpu)
{
    return IsGH100orBetter(pGpu);
}

NvBool rmcfg_IsGB100(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB100);
}

NvBool rmcfg_IsGB100orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB100);
}

NvBool rmcfg_IsGB102(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB102);
}

NvBool rmcfg_IsGB102orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB102);
}

NvBool rmcfg_IsGB10B(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB10B);
}

NvBool rmcfg_IsGB10BorBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB10B);
}

NvBool rmcfg_IsGB110(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB110);
}

NvBool rmcfg_IsGB110orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB110);
}

NvBool rmcfg_IsGB112(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB112);
}

NvBool rmcfg_IsGB112orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB112);
}

NvBool rmcfg_IsGB10X(POBJGPU pGpu)
{
    return IsGB100(pGpu) || IsGB102(pGpu) || IsGB10B(pGpu) || IsGB110(pGpu) || IsGB112(pGpu);
}

NvBool rmcfg_IsGB10XorBetter(POBJGPU pGpu)
{
    return IsGB100orBetter(pGpu);
}

NvBool rmcfg_IsGB202(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB202);
}

NvBool rmcfg_IsGB202orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB202);
}

NvBool rmcfg_IsGB203(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB203);
}

NvBool rmcfg_IsGB203orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB203);
}

NvBool rmcfg_IsGB205(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB205);
}

NvBool rmcfg_IsGB205orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB205);
}

NvBool rmcfg_IsGB206(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB206);
}

NvBool rmcfg_IsGB206orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB206);
}

NvBool rmcfg_IsGB207(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB207);
}

NvBool rmcfg_IsGB207orBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB207);
}

NvBool rmcfg_IsGB20B(POBJGPU pGpu)
{
    return gpuIsImplementation(pGpu, HAL_IMPL_GB20B);
}

NvBool rmcfg_IsGB20BorBetter(POBJGPU pGpu)
{
    return gpuIsImplementationOrBetter(pGpu, HAL_IMPL_GB20B);
}

NvBool rmcfg_IsGB20X(POBJGPU pGpu)
{
    return IsGB202(pGpu) || IsGB203(pGpu) || IsGB205(pGpu) || IsGB206(pGpu) || IsGB207(pGpu) || IsGB20B(pGpu);
}

NvBool rmcfg_IsGB20XorBetter(POBJGPU pGpu)
{
    return IsGB202orBetter(pGpu);
}

NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsGA100(pGpu) || IsGH100(pGpu) || IsGB100(pGpu) || IsGB102(pGpu) || IsGB110(pGpu) || IsGB112(pGpu);
}

NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUSorBetter(POBJGPU pGpu)
{
    return IsGF117(pGpu) || IsGK20A(pGpu) || IsGM108(pGpu) || IsGV11B(pGpu) || IsGA100(pGpu) || IsGA10B(pGpu) || IsGH100(pGpu) || IsGB100(pGpu) || IsGB102(pGpu) || IsGB110(pGpu) || IsGB112orBetter(pGpu);
}

NvBool rmcfg_IsCOMPUTE(POBJGPU pGpu)
{
    return IsGA100(pGpu) || IsGH100(pGpu) || IsGB100(pGpu) || IsGB102(pGpu) || IsGB110(pGpu) || IsGB112(pGpu);
}

NvBool rmcfg_IsdTURING(POBJGPU pGpu)
{
    return IsTU102(pGpu) || IsTU104(pGpu) || IsTU106(pGpu) || IsTU116(pGpu) || IsTU117(pGpu);
}

NvBool rmcfg_IsTURING_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsTU102(pGpu) || IsTU104(pGpu) || IsTU106(pGpu) || IsTU116(pGpu) || IsTU117(pGpu);
}

NvBool rmcfg_IsdAMPERE(POBJGPU pGpu)
{
    return IsGA100(pGpu) || IsGA102(pGpu) || IsGA103(pGpu) || IsGA104(pGpu) || IsGA106(pGpu) || IsGA107(pGpu);
}

NvBool rmcfg_IsdAMPEREorBetter(POBJGPU pGpu)
{
    return IsGA100orBetter(pGpu);
}

NvBool rmcfg_IsAMPERE_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsGA100(pGpu) || IsGA102(pGpu) || IsGA103(pGpu) || IsGA104(pGpu) || IsGA106(pGpu) || IsGA107(pGpu);
}

NvBool rmcfg_IsAMPERE_CLASSIC_GPUSorBetter(POBJGPU pGpu)
{
    return IsGA100orBetter(pGpu);
}

NvBool rmcfg_IsdADA(POBJGPU pGpu)
{
    return IsAD102(pGpu) || IsAD103(pGpu) || IsAD104(pGpu) || IsAD106(pGpu) || IsAD107(pGpu);
}

NvBool rmcfg_IsdADAorBetter(POBJGPU pGpu)
{
    return IsAD102orBetter(pGpu);
}

NvBool rmcfg_IsADA_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsAD102(pGpu) || IsAD103(pGpu) || IsAD104(pGpu) || IsAD106(pGpu) || IsAD107(pGpu);
}

NvBool rmcfg_IsADA_CLASSIC_GPUSorBetter(POBJGPU pGpu)
{
    return IsAD102orBetter(pGpu);
}

NvBool rmcfg_IsdHOPPER(POBJGPU pGpu)
{
    return IsGH100(pGpu);
}

NvBool rmcfg_IsdHOPPERorBetter(POBJGPU pGpu)
{
    return IsGH100orBetter(pGpu);
}

NvBool rmcfg_IsHOPPER_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsGH100(pGpu);
}

NvBool rmcfg_IsHOPPER_CLASSIC_GPUSorBetter(POBJGPU pGpu)
{
    return IsGH100orBetter(pGpu);
}

NvBool rmcfg_IsdBLACKWELL(POBJGPU pGpu)
{
    return IsGB100(pGpu) || IsGB102(pGpu) || IsGB10B(pGpu) || IsGB110(pGpu) || IsGB112(pGpu) || IsGB202(pGpu) || IsGB203(pGpu) || IsGB205(pGpu) || IsGB206(pGpu) || IsGB207(pGpu) || IsGB20B(pGpu);
}

NvBool rmcfg_IsdBLACKWELLorBetter(POBJGPU pGpu)
{
    return IsGB100orBetter(pGpu);
}

NvBool rmcfg_IsBLACKWELL_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsGB100(pGpu) || IsGB102(pGpu) || IsGB10B(pGpu) || IsGB110(pGpu) || IsGB112(pGpu) || IsGB202(pGpu) || IsGB203(pGpu) || IsGB205(pGpu) || IsGB206(pGpu) || IsGB207(pGpu) || IsGB20B(pGpu);
}

NvBool rmcfg_IsBLACKWELL_CLASSIC_GPUSorBetter(POBJGPU pGpu)
{
    return IsGB100orBetter(pGpu);
}

NvBool rmcfg_IsGB10Y(POBJGPU pGpu)
{
    return IsGB10B(pGpu);
}

NvBool rmcfg_IsTEGRA_DGPU_BLACKWELL(POBJGPU pGpu)
{
    return IsGB10B(pGpu) || IsGB20B(pGpu);
}

NvBool rmcfg_IsTEGRA_DISP_CLASSIC_GPUS(POBJGPU pGpu)
{
    return IsGB10B(pGpu) || IsGB20B(pGpu);
}

NvBool rmcfg_IsTEGRA_DISP_CLASSIC_GPUSorBetter(POBJGPU pGpu)
{
    return IsGB10B(pGpu) || IsGB20BorBetter(pGpu);
}

NvBool rmcfg_IsGB20Y(POBJGPU pGpu)
{
    return IsGB20B(pGpu);
}



// NVOC class ID uniqueness checks
#ifdef DEBUG
char __nvoc_class_id_uniqueness_check_0x0x1ab16a = 1;      /* OBJRPC */
char __nvoc_class_id_uniqueness_check_0x0xd4dff8 = 1;      /* OBJRPCSTRUCTURECOPY */

#endif
